Synthesis of Petri nets into FPGA with operation flexible memories

A. Bukowiec, M. Adamski
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引用次数: 16

Abstract

In this paper a new method of Petri net array-based synthesis is proposed. The method is based on the structured encoding of places by means of using minimal numbers of bits together with parallel decomposition of a digital system. State machine subnets, which are determined by colors are attached to places and transitions. Colored microoperations which are assigned to places are written into distributed and flexible memory. It leads to realization of a logic circuit in a two-level concurrent structure, where the combinational circuit of the first level is responsible for firing transitions, and the second level memories are used for generation of microoperations. Such an approach allows balanced usage of different kinds of resources available in modern FPGAs.
本文提出了一种基于Petri网阵列的合成新方法。该方法基于位置的结构化编码,通过使用最小位数和数字系统的并行分解。由颜色决定的状态机子网附加到位置和转换。分配位置的彩色微操作被写入分布式灵活存储器。它导致在两级并发结构中实现逻辑电路,其中第一级的组合电路负责触发转换,第二级存储器用于生成微操作。这种方法允许平衡使用现代fpga中可用的不同类型的资源。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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