S. Matakias, Y. Tsiatouhas, A. Arapoyanni, T. Haniotakis, G. Prenat, S. Mir
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引用次数: 1
Abstract
Although I/sub DDQ/ testing has become a widely accepted defect detection technique for CMOS ICs, its effectiveness in very deep submicron technologies is threatened by the increased transistor leakage current. In this paper, a built-in I/sub DDQ/ testing circuit is presented, that aims to extend the viability of I/sub DDQ/ testing in future technologies and first experimental results are discussed.