Self-convergent trimming of embedded logic compatible OTP memory for VT variation reduction in low voltage SRAMs

Abstract

Self-align nitride (SAN) logic NVM cell coupled by metal gate WL is incorporated into a low-voltage SRAM design. Replacing pull-down transistors in SRAM cells, SAN OTP devices is used to compensate mismatches between the two branches. Through a self-convergent blanket programming operation, the new SRAM cell has been demonstrated to effectively suppress process variation effect, especially critical in low-voltage applications.