Three-dimensional integration scheme using hybrid wafer bonding and via-last TSV process

K. Takeda, M. Aoki, K. Hozawa, F. Furuta, A. Yanagisawa, H. Kikuchi, T. Mitsuhashi, H. Kobayashi
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引用次数: 1

Abstract

A wafer-level three-dimensional (3D) integration scheme for forming via-last through-silicon vias (TSVs) was developed. This scheme includes wafer-to-wafer (W2W) stacking technology with a copper/polymer hybrid bonding and a via-last TSV process compatible with a copper/low-k interconnect structure. Bonding of a copper/polymer hybrid wafer with a ventilation channel structure provides good copper-to-copper bonding as well as good polymer-to-polymer bonding without producing any large bonding voids. Via-last TSVs (8 μm in diameter and 25 μm in length) were successfully formed in the bonded wafer, indicating the effectiveness of the proposed 3D integration scheme.
采用混合晶圆键合和过孔TSV工艺的三维集成方案
提出了一种晶圆级三维(3D)集成的通硅孔(tsv)成形方案。该方案包括具有铜/聚合物杂化键合的晶对晶(W2W)堆叠技术和与铜/低k互连结构兼容的过孔-最后TSV工艺。具有通风通道结构的铜/聚合物杂化晶圆的键合提供了良好的铜与铜键合以及良好的聚合物与聚合物键合,而不会产生任何大的键合空洞。在晶圆上成功地形成了直径为8 μm、长度为25 μm的过孔tsv,表明了所提出的三维集成方案的有效性。
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