Compact implementation IIR filter in FPGA for noise reduction of sensor signal

Abstract

We have designed an infinite impulse response (IIR) filter aimed at reducing noise in systems that evaluate the status of parasympathetic activity. The IIR filter is implemented in a field programmable gate array (FPGA) with fewer components. As a result, compared with a finite impulse response (FIR) filter, which has equivalent frequency characteristics, there is a 69.7% reduction in processing time and the number of each element in the circuit is reduced by over 85.0%. By applying an IIR filter to the target system, the noise-related errors on the system are reduced while maintaining the same performance as that of an FIR filter.