PLANE: A new ATPG system for PLAs

Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI:10.1109/ATS.1993.398788

J.-D. Huang, W. Shen

引用次数: 1

Abstract

In this paper, a new PLA ATPG system PLANE is presented. PLANE uses the depth-first sharp operation for efficient test generation. Besides, a powerful test compaction technique using the intersection buffer is applied to get a more compact test set. PLANE also uses parallel fault simulation and backend fault simulation to exploit its performance. Experimental results show that the test length of PLANE is 7.5% shorter than that of PLATYPUS.<>

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PLANE:一种新的pla ATPG系统

本文介绍了一种新型的PLA ATPG系统PLANE。PLANE使用深度优先的尖锐操作来高效地生成测试。此外，还采用了一种强大的测试压缩技术，即使用交集缓冲来获得更紧凑的测试集。PLANE还采用并行故障仿真和后端故障仿真来开发其性能。实验结果表明，PLANE的测试长度比鸭嘴兽的测试长度短7.5%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)

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