MSI InP/InGaAs DHBT technology: beyond 40 Gbit/s circuits

S. Blayac, M. Riet, J. Benchimol, F. Alexandre, P. Berdaguer, M. Kahn, A. Pinquier, E. Dutisseuil, J. Moulu, A. Kasbari, A. Konczykowska, J. Godin
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引用次数: 39

Abstract

We present current results obtained on IC-oriented OPTO+ InP DHBT lab technology. Transistors with 180/210 GHz F/sub t//F/sub max/, current gain of 50 and BV/sub ce0/=7V are currently fabricated with >99% fabrication yield. Uniformity measurements show a standard deviation on F/sub t/ and F/sub max/ lower than 2% and lower than 5% on all investigated parameters. In a second part DHBT-specific modelling issues are discussed. A 68 Gbit/s selector has been obtained and a 40 Gbit/s master-slave D-type flip-flop (MS-DFF) has been reproducibly fabricated with >50% functional yield using this technology.
MSI InP/InGaAs DHBT技术:超过40gbit /s的电路
我们介绍了目前在面向ic的OPTO+ InP DHBT实验室技术上获得的结果。目前,生产的180/210 GHz F/sub / t//F/sub max/、电流增益为50、BV/sub ce0/=7V的晶体管的产率>99%。均匀性测量结果表明,F/sub t/和F/sub max/的标准差均小于2%,所有研究参数的标准差均小于5%。第二部分讨论了dhbt特有的建模问题。利用该技术获得了68 Gbit/s的选择器和40 Gbit/s的主从d型触发器(MS-DFF),功能收率>50%。
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