Intellectual Completion Tracking System Micro-architecture for Advanced NoC Designs

Sudeep P, Naveen Kanumuri, Sreenath Ak, Vadlamuri Venkata Sateesh
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引用次数: 1

Abstract

The increase in the number of processing elements on network-on-chip (NoC) demands high throughput and low latency with constraints on the area of the chip. Network Interface (NI) is one of the fundamental and performance-hungry blocks in an NoC. NI is responsible for handling acknowledgments for its requests. To handle acknowledgments in an NI, NoC must have a Completion Tracking System block. Completion Tracking System with static queues is prone to huge areas and low throughput. This paper presents an Intellectual Completion Tracking System (ICTS) which can handle multiple outstanding transactions from different initiators and assists in generating the responses from network interfaces, which caters to the network interface between PCI interfaces and nonstandard PCI interfaces.
面向高级NoC设计的智能完井跟踪系统微架构
片上网络(NoC)上处理元素数量的增加要求高吞吐量和低延迟,并且对芯片面积有限制。网络接口(NI)是NoC中最基本、最需要性能的模块之一。NI负责处理其请求的确认。要处理NI中的确认,NoC必须有一个完成跟踪系统块。采用静态队列的完工跟踪系统容易产生面积大、吞吐量低的问题。本文提出了一种智能完成跟踪系统(ICTS),该系统可以处理来自不同发起者的多个未完成事务,并协助生成网络接口的响应,以满足PCI接口和非标准PCI接口之间的网络接口。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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