Joseph Riad, Jianhao Chen, E. Sánchez-Sinencio, Peng Li
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引用次数: 1
Abstract
Large-scale systems-on-a-chips (SoCs) have stringent power requirements to ensure adequate supply of power to on-die devices and prevent catastrophic timing violations. Heterogeneous voltage regulation (HVR) leveraging a combination of on-chip and off-chip voltage regulators has been advocated for ensuring power integrity with maximum efficiency. However, unavoidable process and temperature variations have not been considered in prior HVR work. In this paper, we present an in-depth evaluation of the impacts of process and temperature variations on HVR. Furthermore, we propose a systemic solution to incorporate variation awareness into the HVR system control policy to add a further improvement of up to 4.28% in system power efficiency with minimal hardware overhead.