N. Mading, J. Leenstra, J. Pille, Rolf Sautter, S. Buttner, S. Ehrenreich, W. Haller
{"title":"The vector fixed point unit of the synergistic processor element of the cell architecture processor","authors":"N. Mading, J. Leenstra, J. Pille, Rolf Sautter, S. Buttner, S. Ehrenreich, W. Haller","doi":"10.1109/DATE.2006.243933","DOIUrl":null,"url":null,"abstract":"A vector fixed point unit (FXU) is designed to speed up multimedia processing. The FXU implements SIMD style integer arithmetic and permute operations. The adder, rotator and permute structure enables the use of static circuits only. The FXU was fabricated using IBM 90nm CMOS SOI technology.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2006.243933","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A vector fixed point unit (FXU) is designed to speed up multimedia processing. The FXU implements SIMD style integer arithmetic and permute operations. The adder, rotator and permute structure enables the use of static circuits only. The FXU was fabricated using IBM 90nm CMOS SOI technology.