Simulation of Si-Ge BiCMOS ESD structures operation including spatial current instability mode

Abstract

A 2D simulation approach that takes into account the 3D effects of electro-thermal instability during ESD operation, has been presented. The method is used to provide physical evaluation of a safe operation regime of ESD protection structures and circuits. First results of ESD stress induced hot spot formation using 3D simulation have been presented for the case of a simplified snapback n-MOS device.