Sub-1 V process-compensated MOS current generation without voltage reference

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) Pub Date : 2001-06-14 DOI:10.1109/VLSIC.2001.934221

S. Narendra, D. Klowden, V. De

引用次数: 4

Abstract

A sub-1 V process-compensated MOS current generation concept that does not require a reference voltage is presented. A theoretical model for the concept showing reduced sensitivity to variation in process parameters including gate oxide thickness and threshold voltage is derived. MOSFET device measurements and circuit simulation results show reduced process sensitivity and low voltage operation.

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sub - 1v工艺补偿MOS电流产生无电压基准

提出了一种低于1 V且不需要参考电压的工艺补偿MOS电流产生概念。该概念的理论模型显示对包括栅氧化层厚度和阈值电压在内的工艺参数变化的敏感性降低。MOSFET器件的测量和电路仿真结果表明，降低了过程灵敏度和低电压工作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)

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