Self-timed refreshing approach for dynamic memories

Abstract

Refreshing dynamic circuits must be carried out before stored voltages reach unacceptable levels. In this paper we present CMOS circuitry that can be used to sense the integrity of stored data, provide timely refreshing to these dynamic circuits and provide high performance. Differential amplifiers are used to provide the difference between a degrading stored voltage and a reference voltage. This difference gets converted to a single-ended output which serves as the refresh trigger. Memory arrays are used as test beds to verify the functionality and effectiveness of these circuits. The circuits considered in this paper are suitable for use in high speed, low power and high density memory arrays.