{"title":"A 256-element associative parallel processor","authors":"I. Jalowiechi, R. Lea","doi":"10.1109/ISSCC.1987.1157086","DOIUrl":null,"url":null,"abstract":"A 145K transistor, 2μm CMOS parallel processor capable of executing 262-million 8b additions/s will be detailed. Under the control of an external sequencer, the chip has been used to perform a 3×3 8b convolution in 95μs for image processing applications.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157086","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
A 145K transistor, 2μm CMOS parallel processor capable of executing 262-million 8b additions/s will be detailed. Under the control of an external sequencer, the chip has been used to perform a 3×3 8b convolution in 95μs for image processing applications.