High-Speed SPI Bus Host Controller for Embedded Systems

Abstract

The article focuses on the consideration of the two-level embedded control systems construction based on the SPI bus, in which the Wi-Fi module in the master mode acts as a component of the upper level, effectively implements extended HMI functionality and CNC program buffering. The expediency and possibility of such control systems is substantiated, a practical solution option is offered. The clock frequency of 40MHz and word bit rate of 16 bits was defined as optimal. The advantages of composite decryption of system signals and multiplexing of clock signals are considered. The software model of information exchange is given. Block transaction mode DMA hardware support has been developed. The main differences of the offered high-speed SPI bus from standard decisions, perspective directions of the host controller realization and technical and economic advantages of its use are noted.