Mohamad El-Chaar, A. A. L. Souza, M. Barragán, F. Podevin, S. Bourdel, J. Arnould
{"title":"Integrated Wideband Millimeter-Wave Bias-Tee – Application to Distributed Amplifier Biasing","authors":"Mohamad El-Chaar, A. A. L. Souza, M. Barragán, F. Podevin, S. Bourdel, J. Arnould","doi":"10.1109/NEWCAS50681.2021.9462766","DOIUrl":null,"url":null,"abstract":"A wideband fully-integrated bias-tee well suited for millimeter waves is presented. Compared to conventional bias-tees, where RF-choke is optimized on the basis of its inductance value, here, the proposed RF-choke takes advantage of its low parasitic capacitance as one of the design parameters. While enabling wideband operation, in particular towards lower frequencies, this bias-tee enables ease-of-implementation, robustness against resonance, efficient power delivery to the intended wideband circuit and contributes to circuit area reduction on integrated circuit (IC) implementation. As a proof-of-concept, a wideband CMOS distributed amplifier (DA) with a lower-corner frequency (Flower) of 5 GHz and an upper-corner frequency (Fupper) close to 100 GHz is implemented in STMicroelectronics’ 55-nm technology with the proposed bias-tee connected to its artificial drain line. The implemented bias-tee enabled a bandwidth close to 100 GHz and its RF-choke required a surface area of 82 µm x 82 µm. When integrated along with the DA, the overall chip area remained the same (0.89 mm2). Post-layout simulations showed a DC power overhead (due to inclusion of the on-chip bias-tee) limited to 17% of the DA-only consumption.","PeriodicalId":373745,"journal":{"name":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS50681.2021.9462766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A wideband fully-integrated bias-tee well suited for millimeter waves is presented. Compared to conventional bias-tees, where RF-choke is optimized on the basis of its inductance value, here, the proposed RF-choke takes advantage of its low parasitic capacitance as one of the design parameters. While enabling wideband operation, in particular towards lower frequencies, this bias-tee enables ease-of-implementation, robustness against resonance, efficient power delivery to the intended wideband circuit and contributes to circuit area reduction on integrated circuit (IC) implementation. As a proof-of-concept, a wideband CMOS distributed amplifier (DA) with a lower-corner frequency (Flower) of 5 GHz and an upper-corner frequency (Fupper) close to 100 GHz is implemented in STMicroelectronics’ 55-nm technology with the proposed bias-tee connected to its artificial drain line. The implemented bias-tee enabled a bandwidth close to 100 GHz and its RF-choke required a surface area of 82 µm x 82 µm. When integrated along with the DA, the overall chip area remained the same (0.89 mm2). Post-layout simulations showed a DC power overhead (due to inclusion of the on-chip bias-tee) limited to 17% of the DA-only consumption.