32-bit processing unit for embedded space flight applications

Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems Pub Date : 1995-09-18 DOI:10.1109/RADECS.1995.509779

V. Stachetti, J. Gaisler, G. Goller, C. Le Gargasson

引用次数: 9

Abstract

This paper describes the concurrent error-detection methods as well as the design and layout hardening techniques employed in the ERC 32, a 32-bit modular fault-tolerant processing core for embedded space flight applications. The core consists of three devices: an Integer Unit (IU), a Floating Point Unit (FPU), and a Memory Controller (MEC).

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嵌入式空间飞行应用的32位处理单元

本文介绍了用于嵌入式航天应用的32位模块化容错处理核心erc32中采用的并发错误检测方法以及设计和布局强化技术。核心由三个器件组成:IU (Integer Unit)、FPU (Floating Point Unit)和MEC (Memory Controller)。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems

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