BDD-based logic partitioning for sequential circuits

Abstract

Presents a binary decision diagram (BDD) based approach to perform logic partitioning for sequential circuits. We use a sequential machine to model a circuit and represent the machine by its transition relation. A heuristic algorithm based on the BDD representation of the transition relation is proposed to partition the sequential machine with minimum number of input/output pins. Using BDDs and their operations, we have developed an efficient method to iteratively improve a partition. Experimental results show that our sequential logic partitioning algorithm significantly outperforms partitioning algorithms at the netlist level.