Design of FIR filter based on FPGA

Sun Chao, Qi Hui, Su Tong, Ma Junzhi, Zhu Yongjie, Ding Jianjun
{"title":"Design of FIR filter based on FPGA","authors":"Sun Chao, Qi Hui, Su Tong, Ma Junzhi, Zhu Yongjie, Ding Jianjun","doi":"10.1109/ITNEC48623.2020.9084880","DOIUrl":null,"url":null,"abstract":"The filter designed by the analog circuit has a big problem. It is extremely convenient to design the FIR filter in the FPGA. In the article we will introduce the whole process of the entire FIR filter from design, verification, simulation to implementation. This paper mainly explains the FIR filter principle and filter coefficient calculation, and simulates the linear filter with the sampling rate of 1Mhz, the passband is 120Khz, and the order is 15th order. Finally, the experimental verification is carried out through the FPGA board, and the corresponding The design of the required FIR filter.","PeriodicalId":235524,"journal":{"name":"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITNEC48623.2020.9084880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

The filter designed by the analog circuit has a big problem. It is extremely convenient to design the FIR filter in the FPGA. In the article we will introduce the whole process of the entire FIR filter from design, verification, simulation to implementation. This paper mainly explains the FIR filter principle and filter coefficient calculation, and simulates the linear filter with the sampling rate of 1Mhz, the passband is 120Khz, and the order is 15th order. Finally, the experimental verification is carried out through the FPGA board, and the corresponding The design of the required FIR filter.
基于FPGA的FIR滤波器设计
用模拟电路设计的滤波器存在很大的问题。在FPGA中设计FIR滤波器非常方便。本文将介绍整个FIR滤波器从设计、验证、仿真到实现的全过程。本文主要阐述了FIR滤波器的原理和滤波器系数的计算,仿真了采样率为1Mhz,通频带为120Khz,阶数为15阶的线性滤波器。最后,通过FPGA板进行实验验证,并相应设计出所需的FIR滤波器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信