Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing

Abstract

This paper describes the design of two A/D converters, the Charge Sharing SAR and the Charge Injection SAR, in 22 nm FD SOI technology, for Analog-in-Memory computing in machine learning (ML) applications. The former architecture matches well SRAM-based Matrix-Vector Multipliers (MVM)s, whereas the latter is suitable for integration with SOT-MRAM-based arrays. Both ADCs show remarkable energy figures and area metrics, making the topologies suitable for integration at the periphery of MVM arrays.