{"title":"A fast division algorithm for VLSI","authors":"N. Burgess","doi":"10.1109/ICCD.1991.139973","DOIUrl":null,"url":null,"abstract":"A novel and fast method for VLSI division is presented. The method is based on Svoboda's algorithm and uses the radix-2 signed-digit number system to give a divider in which quotient bit selection is a function of the two most significant digits of the current partial remainder. An n-bit divider produces an n-bit quotient in redundant form in 3n gate delays using n(n-1) controlled full add/subtract circuits. Operand pre-scaling necessary for the algorithm is accomplished by a single subtraction.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139973","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27
Abstract
A novel and fast method for VLSI division is presented. The method is based on Svoboda's algorithm and uses the radix-2 signed-digit number system to give a divider in which quotient bit selection is a function of the two most significant digits of the current partial remainder. An n-bit divider produces an n-bit quotient in redundant form in 3n gate delays using n(n-1) controlled full add/subtract circuits. Operand pre-scaling necessary for the algorithm is accomplished by a single subtraction.<>