Power Supply Rejection and Sensitivity Analyses of a Peak Current Source with Emitter Degeneration

Abstract

Technology developments are demanding increasingly stringent requirements in terms of Electromagnetic Compatibility (EMC). For IC designers, this implies increasing Power Supply Rejection (PSR) while at the same time reducing the Icc spectrum. This work provides a theoretical analysis of the Peak Current Source with emitter degeneration (PCS-ED), a well known current mirror to achieve high PSR, which gets improved even further by the emitter resistance. The trade-off between the output current and the PSR were analyzed, as well as a sensitivity analysis to quantify the effects of the emitter degeneration. Experimental measurements have been performed to validate the immunity of an off-the-shelf bipolar transistor array from 100kHz up to 1GHz. Results showed that despite the small-signal analyses predicted a considerable improvement, the non-linear effects introduced by the input stage remained as the limiting factor in terms of PSR, leading to similar responses in the Peak Current Source (PCS) and the PCS-ED, despite one having much larger PSR than the other.