Advances in neuron-MOS applications

Abstract

This paper shows how computationally-expensive problems like image processing can be handled in real time with little hardware by neuron-MOS (/spl upsi/MOS) circuit technology. In digital signal processing, real-world data (analog, massive in quantities, low-precision and ambiguous) are A/D converted upon acquisition, including inherent noise and distortion, and then are bit-by-bit computed based on rigorous Boolean algebra. In moving-image processing for instance, this requires extraordinary computational powers of DSPs and MPUs, making real-time response of electronic systems unrealistic. Introduction of analog processing would lessen the difficulty, but cost must be traded off for accuracy. Analog/digital merged computation using /spl upsi/MOS circuits features the flexibility of analog processing but preserving the rigorousness of digital. Highly-parallel analog processing is performed for a large volume of analog input data, that is immediately followed by the binary decision of /spl upsi/MOS gates, resulting in the output of digital codes. Real-world data are directly compressed to digital codes without A/D conversion. The power of this scheme is demonstrated in applications to motion vector search in a few hundred nanoseconds and real-time center-of-mass tracing of a moving object and to building real-time event recognition hardware.