A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier

Abstract

A Software-Defined Radio (SDR) analog front-end is presented that provides extensive programmability of LO generator, LNA, mixers, baseband filters and PPA, supporting various wireless communication standards while guaranteeing a near-optimal power/performance trade-off at any time. The circuit is integrated in a 0.13 mum CMOS technology with 1.2 V supply voltage. This transceiver covers the frequency range from 100 MHz up to 6 GHz by exploiting a flexible zero-IF architecture. The receive path achieves a Noise Figure of 4.8 dB at 174 MHz and 6 dB at 2.4 GHz. For a WLAN OFDM 64 QAM output, the transmitter achieves an EVM better than -29 dB for -0.5 dBm output power at 2.4 GHz and -3.1 dBm output power at 4.9 GHz.