Architecture, defect tolerance, and buffer design for a new ATM switch

Abstract

This paper presents a modular architecture for a scalable ATM-switch. The cell routing function, and the associated queueing, is distributed over many small clusters of nodes, called basic modules. These basic modules are hierarchically interconnected to form larger switches. In a basic module, every node is interconnected with adjacent nodes in the same module with three of its four links. The fourth link is used to connect either to external ports or to other basic modules at higher levels of the hierarchy. From a hardware implementation perspective, the simplicity of the architecture stems from the fact that each node in the switch consists of two small crossbar switches of low complexity and a buffer, plus a controller. The hierarchial nature of the topology allows for modular growth of the switch. Further, the interconnection topology of the switch makes it suitable for 3-D (stacked VLSI/WSI) implementation.