{"title":"A 16.6μW 32.8MHz monolithic CMOS relaxation oscillator","authors":"Yat-Hei Lam, Seong-Jin Kim","doi":"10.1109/ASSCC.2014.7008885","DOIUrl":null,"url":null,"abstract":"This paper presents a 32.8MHz low power, supply insensitive monolithic CMOS relaxation oscillator. Instead of using voltage-mode comparators for cycle-to-cycle capacitor voltage swing (CVS) threshold voltage comparison, the CVS is regulated by a low-power closed-loop control which consists of a current-controlled delay cell (CCDC), a Gm-C error integrator and a comparator-free switch logic block. The CCDC and switching logics are powered by a logic supply regulator for reducing switching-losses and line sensitivity. The oscillator consumes 16.6μW from a 1.5V supply voltage at room temperature, achieving a FOM of 0.51μW/MHz. The measured output frequency variation is <;±0.13%/V @ 32.8MHz, for a supply range of 1.5V to 3.6V It occupies 0.013mm2 in a 0.18μm CMOS process.","PeriodicalId":161031,"journal":{"name":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2014.7008885","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
This paper presents a 32.8MHz low power, supply insensitive monolithic CMOS relaxation oscillator. Instead of using voltage-mode comparators for cycle-to-cycle capacitor voltage swing (CVS) threshold voltage comparison, the CVS is regulated by a low-power closed-loop control which consists of a current-controlled delay cell (CCDC), a Gm-C error integrator and a comparator-free switch logic block. The CCDC and switching logics are powered by a logic supply regulator for reducing switching-losses and line sensitivity. The oscillator consumes 16.6μW from a 1.5V supply voltage at room temperature, achieving a FOM of 0.51μW/MHz. The measured output frequency variation is <;±0.13%/V @ 32.8MHz, for a supply range of 1.5V to 3.6V It occupies 0.013mm2 in a 0.18μm CMOS process.