On-the-fly rounding for division and square root

Abstract

In division and square root implementation based on digit-recurrence algorithms, the result is obtained in digit-serial form, from most significant digit to least significant. To reduce the complexity of the result-digit selection and to allow the use of redundant addition, the result-digit has values from a signed-digit set. As a consequence, the result has to be converted to conventional representation. This conversion can be done on-the-fly as the digits are produced, without the use of a carry-propagate adder. The authors describe how to modify this conversion process so that the result is rounded. The resulting operation is faster than what is done conventionally because no carry-propagate addition is needed. Three rounding methods that differ in the rounding error and the hardware and time required are described.<>