Path aware event scheduler in HoldAdvisor for fixing min timing violations

Abstract

Min timing violations are fatal and need to be fixed in order to avoid chip failure. HoldAdvisor is used in chip design to find good locations for buffer insertion or swaps to assist in min timing fixing. Previously published work on buffer insertion has mainly focused on reducing delays to fix max timing violations. Those approaches cannot be directly applied to delay insertion for fixing min timing violations. A simple algorithm without considering path commonality has been used in HoldAdvisor. In this paper, we propose a novel approach to select nodes to fix min timing violations without causing new max timing violations. It dynamically computes the number of paths that can be fixed when a buffer is inserted or swapped at a particular location, and selects the node with the biggest gain. Compared to previous algorithms, it generates much better min timing solutions by making much fewer changes to a design.