Efficient Non-Binary Hamming Codes for Limited Magnitude Errors in MLC PCMs

Abstract

Emerging non-volatile main memories (e.g. phase change memories) have been the continuous focus of research currently. These memories provide an attractive alternative to DRAM with their high density and low cost. But the dominant error models in these memories are of limited magnitude caused by resistance drifts. Hamming codes have been used extensively to protect DRAM due to their low decoding latency and low redundancy as well. But with limited magnitude errors, traditional Hamming codes prove to be inefficient. This paper proposes a new systematic limited magnitude error correcting non-binary Hamming code specifically to address limited magnitude errors in multilevel cell memories storing multiple bits per cell. A general construction methodology is presented to correct errors of limited magnitude and is compared to existing schemes addressing limited magnitude errors in phase change memories. A syndrome analysis is done to show the reduction in total number of syndromes for limited magnitude error models. It is shown that the proposed codes provide better latency and complexity compared to existing limited magnitude error correcting non-binary Hamming codes. It is also shown that the proposed codes achieve better redundancy compared to the symbol extended version of binary Hamming codes.