14nm FDSOI upgraded device performance for ultra-low voltage operation

O. Weber, E. Josse, J. Mazurier, N. Degors, S. Chhun, P. Maury, S. Lagrasta, D. Barge, J. Manceau, M. Haond
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引用次数: 27

Abstract

A performance upgrade of our 14nm FDSOI technology is reported in this paper. Compared to our previous 14nm FDSOI assessment, a -17% delay at the same leakage is demonstrated. We show that the AC performance of 28nm FDSOI at a 0.9V supply voltage is reached at 0.6V in 14nm FDSOI technology. This corresponds to a 50% increase in frequency at the same dynamic power, or a 65% power saving at the same operation frequency. The transistors are optimized to provide better drive current and, for the first time, a novel SiBCN low-k spacer material is successfully integrated in a gate-first FDSOI technology, providing a 10% reduction in gate-to-source/drain parasitic capacitance.
14nm FDSOI升级器件性能,实现超低电压工作
本文报道了我们的14nm FDSOI技术的性能升级。与我们之前的14nm FDSOI评估相比,在相同的泄漏下证明了-17%的延迟。我们证明了28nm FDSOI在0.9V电源电压下的交流性能在14nm FDSOI技术中达到0.6V电源电压。这相当于在相同的动态功率下频率增加50%,或在相同的工作频率下节省65%的功率。该晶体管经过优化,可提供更好的驱动电流,并且首次将新型SiBCN低k间隔材料成功集成到栅极优先FDSOI技术中,从而使栅极到源/漏极寄生电容降低10%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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