Innovative Puck Design for the Mechanical Cross-Sectioning and Subsequent Analysis of Semiconductor Packaged Samples in Failure Analysis

Abstract

The causes of failure in flip-chip packaged devices are often found at the interface between the die and package. Exposing the site of interest usually entails some form of mechanical cross-sectioning with the sample embedded in an epoxy puck. This article brings attention to some of the drawbacks with the current approach and presents a solution in the form of a redesigned puck. As test results show, the new puck significantly reduces polishing time, and when cast with a conductive epoxy, minimizes charging artifacts and image distortion during SEM analysis. It also facilitates easy sample removal for subsequent analysis.