Broadband CMOS RF Logarithmic Power Detector for sub-6 GHz 5G Applications

Abstract

This paper describes the design of an RF power detector which has broad bandwidth and high dynamic range. The proposed RF power detector includes a low noise amplifier (LNA), limiting amplifiers, a peak detector and an adder circuit. The amplifier circuits uses cascode structure and inductive shunt peaking to achieve wide operating frequency range with band pass matching network for matching the RF input to 50Ω. Designed using UMC 180nm RFCMOS, the power detector circuit provides a largely linear relation between input logarithmic power and output DC voltage for the frequency range from 300 MHz to 5.4 GHz. The percentage bandwidth is 178.94%. The RF power detector circuit is tested for input power ranging from −70dBm to 0 dBm. The circuit exhibits dynamic range of 50 dB from 300 MHz to 5.4GHz and 70 dB from 700MHz to 4 GHz. This makes RF power detector suitable for broadband use in the sub-6 GHz 5G applications.