Low-power equalizers for 51.84 Mb/s very-high-speed digital subscriber loop (VDSL) modems

Abstract

We present low-power equalizers derived via dynamic algorithm transformations (DAT). These transformations achieve low-energy operation by reconfiguring the architecture and the supply voltage in response to channel non-stationarities. Practical reconfiguration strategies are derived as a solution to an optimization problem with energy as the objective function and a constraint on the algorithm performance (specifically the SNR). Simple energy models for multipliers are presented. The DAT-based adaptive filter is employed as an equalizer for 51.84 Mbit/s very high-speed digital subscriber loop (VDSL) over 24-pair BKMA cable. On average, 88% energy savings are achieved due to variations in cable length and number of far-end crosstalk (FEXT) interferers.