A design for reliability methodology based on selective overdesign

Abstract

Negative Bias Temperature Instability and Channel Hot Career degrades the life time of both the analog and digital circuits significantly and should be a major concern in nanoscale regime. These problems are usually addressed by leaving large design margins (called overdesign) or employing complicated calibration algorithm both of which result in larger area as well as excessive power consumption. We present a methodology to grade critical sections of a circuit and selectively overdesign them to harden the circuit characteristics against of these degradation. We have demonstrated our approach for various example circuits. For these examples, compared to conservative overdesign techniques, our approach achieves up to 20% and 33% improvement for area and power, respectively.