A low power and radiation-tolerant FPGA implemented in FD SOI process

Abstract

A 330,000 gate field programmable gate array (FPGA) VS12C fabricated on 0.2μm full-depletion silicon-on-insulator (FD SOI) process is presented and the test results indicate this chip has the lower power and higher tolerance to radiation compared with Xilinx radiation-hardened XQVR300 chip implemented on 0.22μm epitaxial silicon. This paper demonstrates the benefit of the FD SOI technology on low power and radiation-tolerant FPGA circuit design.