A reliable and high voltage compatible CMOS I/O buffer

Hwang-Cherng Chow, You-Gang Chen
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引用次数: 1

Abstract

A high voltage tolerant and reliable CMOS I/O buffer without using thick-oxide devices is presented. By the floating n-well technique, the proposed design has a simpler structure and the good gate-oxide reliability is achieved. In addition, it is dc leakage free and has no redundant pad for dual powers. From the simulation results, the proposed circuit can demonstrate both speed enhancement about 20% in pull-up operation and 50% saving in area. Therefore, the proposed I/O buffer is very suitable for mixed voltage interface applications.
一个可靠的和高电压兼容CMOS I/O缓冲器
提出了一种高耐压可靠的CMOS I/O缓冲器,无需使用厚氧化物器件。采用浮动n井技术,设计结构简单,具有良好的栅极氧化可靠性。此外,它是直流无漏电,没有冗余垫双电源。仿真结果表明,该电路的上拉运算速度提高了20%左右,面积节省了50%。因此,所提出的I/O缓冲器非常适合混合电压接口应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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