Exploiting multi-level scratchpad memories for time-predictable multicore computing

Abstract

In modern multicore processor architectures, caches are widely used to shorten the speed gap between the processor and the memory. However, caches are time unpredictable, especially the shared L2 cache used by different cores in a multicore processor. This paper studies several time-predictable scratchpad memory (SPM) based architectures for multicore processors. We propose the dynamic memory objects allocation-based partition, the static allocation-based partition, and the static allocation-based priority L2 SPM strategy to retain the characteristic of time predictability of SPMs while trying to maximize the performance and energy efficiency. Our experimental results indicate the strengths and weaknesses of each proposed architecture and allocation method, which offers interesting memory design options to enable real-time multicore computing.