Implementing evolution of FIR-filters efficiently in an FPGA

Abstract

Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for evolvable hardware (EHW) is well suited for real-time adaptive systems. This paper contains a novel approach on how to evolve the parameters for an adaptive digital filter. Both the filter as well as the evolution is implemented in a single field programmable gate array (FPGA). The circuit is based on context-switching in FPGA-devices and preliminary results indicate a compact hardware as well as fast adaptation.