Formal verification of switched capacitor DC to DC power converter using circuit simulation traces

Abstract

DC-DC power converters based on switched capacitor circuits are widely used to realize different power supply domains in SOC chips. They can be classified as Analog Mixed Signal circuits. Current approaches to their verification is primarily based on simulating their transistor level netlist in circuit simulators. In this paper an approach to formally verify them using simulation traces is proposed, where the traces are obtained from an actual CMOS design implementation of a switched capacitor DC-DC (SC DC-DC) power converter in Cadence Spectre circuit simulator.