The impact of junction angle on tunnel FETs

Abstract

We derive an analytical model based on circular tunnel paths along the electric field to describe the behavior of a tunnel FET with a junction angle at the source. The model is compared with simulation results and qualitative agreement is observed. We further demonstrate that a small junction angle prevents TFET performance degradation resulting from a high-k spacer. Finally we optimize the junction angle with an encroaching source structure, studying the dependence on oxide thickness and semiconductor material.