Dynamic element matching in decomposed digital-to-analog converters

Abstract

A dynamic element matching (DEMJ technique is proposed that aims at improving the spurious-free dynamic range (SFDR) of current-steering digital-to-analog converters (DAG) implemented with a decomposed architecture. The architecture consists of a number of small binary-weighted DACs that are controlled such that only a minimum number of unit current sources are switching for the most critical code transitions. The DEM is obtained by scrambling bit pairs with equal weight. In contrast to most other DEM techniques, the scrambling is performed conditionally so that the number of switching current sources does not increase compared with the unscrambled case. Hence, the good glitch properties of the decomposed convener architecture are maintained. Simulations on a behavioral level of some decomposed DACs have been performed. Assuming random uncorrelated matching errors with Gaussian distribution and a 5% standard deviation, the SFDR value giving 90 % yield is increased with 5.6 dB for a 14-bit DAC using scrambling of the two bit pairs with the largest weights. The hardware cost for the required scrambling circuits should be low since only two pairs of bits are scrambled.