F. Arnaud, S. Clerc, S. Haendler, R. Bingert, P. Flatresse, V. Huard, T. Poiroux
{"title":"Enhanced design performance thanks to adaptative body biasing technique in FDSOI technolologies","authors":"F. Arnaud, S. Clerc, S. Haendler, R. Bingert, P. Flatresse, V. Huard, T. Poiroux","doi":"10.1109/S3S.2017.8308754","DOIUrl":null,"url":null,"abstract":"This paper presents a comprehensive analysis of Adaptive Body Bias (ABB) interests provided by Fully Depleted Silicon On Insulator (FDSOI) technology. At transistor level, we demonstrate a total process variability and temperature effect compensation thanks reverse and forward bias. Those benefits have been reached without degradation of devices reliability versus regular Adaptative Voltage Scaling solution (AVS). Leveraging this triple advantages (variability, temperature and ageing), digital design density is discussed showing significant reduction of W/L metric in case of ABB usage in CPU core. Forward Body Biasing (FBB) exhibited significant analog performance increasing (+100%) on key parameters such as gm and gd for both I/Os and core oxide devices. Finally, outstanding Vmin yield improvement thanks to ABB technique is demonstrated on commercial product in the automotive market.","PeriodicalId":333587,"journal":{"name":"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2017.8308754","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
This paper presents a comprehensive analysis of Adaptive Body Bias (ABB) interests provided by Fully Depleted Silicon On Insulator (FDSOI) technology. At transistor level, we demonstrate a total process variability and temperature effect compensation thanks reverse and forward bias. Those benefits have been reached without degradation of devices reliability versus regular Adaptative Voltage Scaling solution (AVS). Leveraging this triple advantages (variability, temperature and ageing), digital design density is discussed showing significant reduction of W/L metric in case of ABB usage in CPU core. Forward Body Biasing (FBB) exhibited significant analog performance increasing (+100%) on key parameters such as gm and gd for both I/Os and core oxide devices. Finally, outstanding Vmin yield improvement thanks to ABB technique is demonstrated on commercial product in the automotive market.