Hierarchical statistical inference model for specification based testing of analog circuits

Heebyung Yoon, P. Variyam, A. Chatterjee, N. Nagi
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引用次数: 18

Abstract

In this paper, we propose a framework for analyzing the effects of circuit parameter variations on high level system specifications in a hierarchical manner. The effects of parameter variations in one level of design hierarchy on those of the next are mapped through linear and piecewise linear sensitivity functions. The models allow computation of the statistical distributions of the circuit parameters and their correlations. This data is used to determine the critical circuit specifications that must be measured and those that may be eliminated from the testing process.
基于规格的模拟电路测试的分层统计推理模型
在本文中,我们提出了一个框架,以层次方式分析电路参数变化对高层次系统规格的影响。通过线性和分段线性灵敏度函数来映射设计层次中某一层次参数变化对下一层次参数变化的影响。该模型允许计算电路参数的统计分布及其相关性。这些数据用于确定必须测量的关键电路规格和那些可以从测试过程中消除的规格。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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