Efficient Compression Technique for NoC-based Deep Neural Network Accelerators

Abstract

Deep Neural Networks (DNNs) are very powerful neural networks, widely used in many applications. On the other hand, such networks are computation and memory intensive, which makes their implementation difficult onto hardwareconstrained systems, that could use network-on-chip as interconnect infrastructure. A way to reduce the traffic generated among memory and the processing elements is to compress the information before their exchange inside the network. In particular, our work focuses on reducing the huge number of DNN parameters, i.e., weights. In this paper, we propose a flexible and low-complexity compression technique which preserves the DNN performance, allowing to reduce the memory footprint and the volume of data to be exchanged while necessitating few hardware resources. The technique is evaluated on several DNN models, achieving a compression rate close to 80% without significant loss in accuracy on AlexNet, ResNet, or LeNet-5.