Design trade-offs in Schottky-base I2L—An advanced bipolar technology

Abstract

This paper describes a novel bipolar technology, the Schottky-Base I2L, which offers significant advantages in terms of packing density, device performance, and reduced LSI circuit complexity as compared to conventional I2L designs. A pnp transistor fabricated in an n-epitaxial layer on a p+substrate forms the active switch for this design. Current source to the pnp is provided by an npn transistor. Schottky diodes are formed on the pnp base which is merged with the npn (injector) collector. Hence, the basic logic gate in this design is a multi-input, multi-output NAND gate. Because an n-on-p type structure is used, TTL, STTL, or ECL circuits can be made readily available on chip. Design trade-offs for optimizing the speed-power performance are described. Experimental data on a test chip indicate pnp current gain of ∼80 and a minimum delay of 10 ns of the SBI2L gate using 7.5 µm minimum linewidths.