EPISODE, A Set of Tools Oriented to Logic Integrated Circuit Design Verification and Testing

ESSCIRC 76: 2nd European Solid State Circuits Conference Pub Date : 1976-09-01 DOI:10.1109/ESSCIRC.1976.5469075

C. Lam, J. Thuel, R. Tulloue

引用次数: 2

Abstract

The main features of the EPISODE system of logic simulators are described. Its use during circuit design process and its extensions for the simulation of very large scale integrated circuits are presented.

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一套面向逻辑集成电路设计验证与测试的工具

介绍了逻辑模拟器的EPISODE系统的主要特点。介绍了它在电路设计过程中的应用及其在超大规模集成电路仿真中的扩展。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ESSCIRC 76: 2nd European Solid State Circuits Conference

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