{"title":"Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOS","authors":"Jinhua Ni, Zhiliang Hong, B. Liu","doi":"10.1109/ESSCIRC.2009.5325987","DOIUrl":null,"url":null,"abstract":"A fully-integrated DC-DC converter with on-chip inductors and capacitors is realized in a 0.13 µm CMOS technology. By using an asymmetric, high-Q inductor, power efficiency comparable to that of converters implemented with off-chip inductors is achieved. Straightforward analysis of high-density capacitor structure results in minimal ESR and optimal filtering of the output. The manufactured converter achieves a peak power efficiency of 80.5 % for an optimal load current of 170 mA and a voltage conversion ratio of 0.76 when switching at 180 MHz. This design is approximately 23 % more efficient than a linear regulator at a voltage conversion ratio of 0.55. A simple voltage mode PWM control keeps the output stable at the desired level, under load conditions from 0 mW to 720 mW.","PeriodicalId":258889,"journal":{"name":"2009 Proceedings of ESSCIRC","volume":"43 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Proceedings of ESSCIRC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2009.5325987","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 29
Abstract
A fully-integrated DC-DC converter with on-chip inductors and capacitors is realized in a 0.13 µm CMOS technology. By using an asymmetric, high-Q inductor, power efficiency comparable to that of converters implemented with off-chip inductors is achieved. Straightforward analysis of high-density capacitor structure results in minimal ESR and optimal filtering of the output. The manufactured converter achieves a peak power efficiency of 80.5 % for an optimal load current of 170 mA and a voltage conversion ratio of 0.76 when switching at 180 MHz. This design is approximately 23 % more efficient than a linear regulator at a voltage conversion ratio of 0.55. A simple voltage mode PWM control keeps the output stable at the desired level, under load conditions from 0 mW to 720 mW.