Stability of Hybrid SET-CMOS Based NOT Gate

Abstract

This work demonstrates the stability analysis of SET-CMOS based hybrid NOT gate. Under different temperature condition the stability of the circuit is checked using one of the popular software SIMON, dedicated for the Single electron Device simulation. For the straightforward stability simulation of the circuit in SIMON simulator the circuit has been modified by replacing the MOS with an equivalent resistance as SIMON does not support the co-simulation of SET and MOSFET. Simulation results of the logic operation and stability analysis are furnished in support.