T1: Design for Manufacturability

Y. Zorian, J. Carballo
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Abstract

In addition to designing the functionality, today’s SOC necessitates designing for manufacturability, yield and reliability. Such requirements are fundamentally transforming the current SoC design methodology techniques for enhancing manufacturability, yield and reliability or "DFX" to include yield enhancement techniques, resolution enhancement techniques, new or restricted design rules, variability-aware design, and the addition of a special family of embedded IP blocks, called infrastructure IP blocks. The latter blocks are meant to ensure manufacturability of the SoC and to achieve adequate levels of yield and reliability. The infrastructure IP leverages the manufacturing knowledge and feeds back the information into the design phase. This tutorial analyzes the key trends and challenges resulting in manufacturing susceptibility and field reliability that necessitate the use of the above DFX techniques. Then, it concentrates on several examples of each of these techniques.
T1:可制造性设计
除了设计功能外,今天的SOC还需要设计可制造性,成品率和可靠性。这些要求从根本上改变了当前的SoC设计方法技术,用于提高可制造性,良率和可靠性或“DFX”,包括良率增强技术,分辨率增强技术,新的或受限制的设计规则,可变性感知设计,以及添加特殊系列的嵌入式IP块,称为基础设施IP块。后一个模块旨在确保SoC的可制造性,并达到足够的良率和可靠性水平。基础设施IP利用制造知识并将信息反馈到设计阶段。本教程分析了导致制造敏感性和现场可靠性的关键趋势和挑战,这些趋势和挑战需要使用上述DFX技术。然后,重点介绍每种技术的几个示例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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