Development of tapeless lead-on-chip (LOC) packaging process with i-line photosensitive polyimide

Abstract

A double-sided adhesive tape is typically used as an insulator and mechanical buffer layer between the chip and lead frame in lead-on-chip (LOC) packages. The costs associated with the lead frame and tape process make the current LOC package more expensive than conventional packaging. A new tapeless LOC package process has been developed which significantly reduces the production costs. In this new process, the tape is replaced by a i-line photosensitive thermosetting polyimide layer coated on the passivation deposited wafer. This paper describes the optimum material properties for the polyimide, the fabrication process parameters, and the experimental and simulated reliability and performance results of the tapeless LOC package.